/**
  ******************************************************************************
  * @file    sym32l010_hal_gpio.h
  * @author  AE Team
  * @version 1.0.3
  * @date    2024-05-28 11:32:22
  * @brief   Header file of GPIO HAL module.
  *
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2024 SIYIMicro.
  * All rights reserved.</center></h2>
  *
  *
  ******************************************************************************
  */


/******************************************************************************/
/* PINMUX TABLE                                                               */
/******************************************************************************/

// ------------------------------------------------------------------------------------------------------------------------------------
// fun=0      | fun=1      | fun=2      | fun=3      | fun=4      | fun=5      | fun=6      | fun=7      | Analog                      |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA00/HSEI  | UART1_RXD  | I2C1_SDA   | SPI1_SCK   | BTIM1_TOGP | BTIM3_ETR  | ATIM_BK2   | ATIM_CH4   | ADC_IN0 /VC1_IN1            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA01/HSEO  | UART1_TXD  | I2C1_SCL   | SPI1_NCS   | BTIM1_TOGN | GTIM1_CH3  | ATIM_BK    | ATIM_CH4N  | ADC_IN1                     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA02       | PCLK_OUT   | ATIM_MOEOUT| SPI1_NCS   | VC1_OUT    | IR_OUT     | ATIM_ETR   | ATIM_CH1N  | ADC_IN2                     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA03       | UART2_TXD  | LPTIM_CH1  | SPI1_MISO  | BTIM1_ETR  | IR_OUT     | GTIM1_CH4  | ATIM_CH3   | ADC_IN3 /VC1_IN2 /LVDIN     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA04       | UART2_RXD  | LPTIM_CH2  | SPI1_MOSI  | MCO_OUT    | VC2_OUT    | GTIM1_CH3  | ATIM_CH1N  | ADC_IN4                     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA05       | UART1_RXD  | LPTIM_OUT  | SPI1_SCK   | I2C1_SDA   | HEXEN      | GTIM1_CH2  | ATIM_CH2N  | ADC_IN5 /VC2_IN1            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA06       | UART1_TXD  | LPTIM_ETR  | SPI1_MOSI  | I2C1_SCL   | BTIM2_ETR  | GTIM1_CH1  | ATIM_CH3N  | ADC_IN6                     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA07/SWDIO | UART1_RXD  | I2C1_SDA   | SPI1_MISO  | LPTIM_OUT  | BTIM2_TOGP | ATIM_BK    | ATIM_CH6   |                             |
// ------------------------------------------------------------------------------------------------------------------------------------
// PA08/SWCLK | UART1_TXD  | I2C1_SCL   | MCO_OUT    | VC1_OUT    | BTIM2_TOGN | ATIM_BK2   | ATIM_CH6N  |                             |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB00/LSEO  | UART1_RXD  | UART2_CTS  | SPI1_SCK   | I2C1_SDA   | LVD_OUT    | BTIM3_TOGP | ATIM_CH1   | ADC_IN7                     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB01/LSEI  | UART1_TXD  | UART2_RTS  | SPI1_NCS   | I2C1_SCL   | ADC_SAM    | BTIM3_TOGN | ATIM_CH2   | ADC_IN8                     |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB02       | UART2_TXD  | UART1_CTS  | SPI1_MISO  | VC2_OUT    | LPTIM_CH1  | GTIM1_ETR  | ATIM_CH2   | ADC_IN9 /VC2_IN2            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB03       | UART2_RXD  | UART1_RTS  | SPI1_MOSI  | MCO_OUT    | BTIM2_TOGN | GTIM1_CH4  | ATIM_CH2N  | ADC_IN10/VC1_IN3            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB04       | UART2_TXD  | RTC_OUT    | ADC_SAM    | BTIM1_ETR  | BTIM2_TOGP | GTIM1_CH3  | ATIM_CH1   | ADC_IN11/VC2_IN3            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB05       | UART2_TXD  | RTC_TAMP   | SPI1_MISO  | I2C1_SDA   | GTIM1_ETR  | GTIM1_CH2  | ATIM_CH5   | ADC_IN12/VC1_IN0            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB06       | UART2_RXD  | RTC_OUT    | SPI1_MOSI  | I2C1_SCL   | ATIM_ETR   | GTIM1_CH1  | ATIM_CH5N  | ADC_IN13/VC2_IN0            |
// ------------------------------------------------------------------------------------------------------------------------------------
// PB07/NRST  |            |            |            |            | GTIM1_ETR  | ATIM_ETR   | ATIM_BK    |                             |
// ------------------------------------------------------------------------------------------------------------------------------------


/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SYM32L010_HAL_GPIO_H
#define __SYM32L010_HAL_GPIO_H


#ifdef __cplusplus
extern "C" {
#endif


/******************************************************************************/
/* Include files                                                              */
/******************************************************************************/
#include "sym32l010_hal_def.h"


/******************************************************************************/
/* Global type definitions                                                    */
/******************************************************************************/
/* GPIO_PinState -------------------------------------------------------------*/
typedef enum
{
    GPIO_PIN_RESET             = 0UL,
    GPIO_PIN_SET               = 1UL
} GPIO_PinState;

/* GPIO_FilterClk ------------------------------------------------------------*/
typedef enum
{
    GPIO_FILTERCLK_HCLK2       = (0x0UL << GPIOx_FILTER_FLTCLK_Pos),
    GPIO_FILTERCLK_HCLK4       = (0x1UL << GPIOx_FILTER_FLTCLK_Pos),
    GPIO_FILTERCLK_HCLK8       = (0x2UL << GPIOx_FILTER_FLTCLK_Pos),
    GPIO_FILTERCLK_BTIM1OV     = (0x3UL << GPIOx_FILTER_FLTCLK_Pos),
    GPIO_FILTERCLK_LSI         = (0x5UL << GPIOx_FILTER_FLTCLK_Pos),
    GPIO_FILTERCLK_LPTIMOV     = (0x7UL << GPIOx_FILTER_FLTCLK_Pos)
} GPIO_FilterClkTypeDef;

/* GPIO Pull -----------------------------------------------------------------*/
typedef enum
{
    GPIO_PULL_NONE             = 0x0UL,                               // 无上下拉
    GPIO_PULL_UP               = 0x1UL                                // 上拉使能
} GPIO_PullTypeDef;

/* GPIO Mode -----------------------------------------------------------------*/
typedef enum
{
    GPIO_MODE_ANALOG           = (0x00UL),                            // 模拟量
    GPIO_MODE_INPUT            = (0x10UL),                            // 数字量浮空输入
    GPIO_MODE_OUTPUT_PP        = (0x20UL),                            // 数字量推挽输出
    GPIO_MODE_OUTPUT_OD        = (0x21UL)                             // 数字量开漏输出
} GPIO_ModeTypeDef;

/* GPIO_InitTypeDef ----------------------------------------------------------*/
typedef struct
{
    GPIO_ModeTypeDef             Mode;                                // GPIO_MODE_ANALOG ... GPIO_MODE_OUTPUT_OD
    GPIO_PullTypeDef             Pull;                                // GPIO_PULL_NONE / GPIO_PULL_UP
    uint16_t                     IT;                                  // GPIO_IT_NONE     ... GPIO_IT_FALLING
    uint16_t                     Pins;                                // GPIO_PIN_0       ... GPIO_PIN_8 / GPIO_PIN_ALL
} GPIO_InitTypeDef;


/******************************************************************************/
/* Global pre-processor symbols/macros ('#define')                            */
/******************************************************************************/
/* GPIO IT Mode select -------------------------------------------------------*/
#define GPIO_IT_NONE                    (0x00UL)
#define GPIO_IT_RISING                  (0x01UL)
#define GPIO_IT_FALLING                 (0x02UL)

/* PIN Select ----------------------------------------------------------------*/
#define GPIO_PIN_0                      ((uint16_t) 0x0001UL)    /* Pin 0 selected */
#define GPIO_PIN_1                      ((uint16_t) 0x0002UL)    /* Pin 1 selected */
#define GPIO_PIN_2                      ((uint16_t) 0x0004UL)    /* Pin 2 selected */
#define GPIO_PIN_3                      ((uint16_t) 0x0008UL)    /* Pin 3 selected */
#define GPIO_PIN_4                      ((uint16_t) 0x0010UL)    /* Pin 4 selected */
#define GPIO_PIN_5                      ((uint16_t) 0x0020UL)    /* Pin 5 selected */
#define GPIO_PIN_6                      ((uint16_t) 0x0040UL)    /* Pin 6 selected */
#define GPIO_PIN_7                      ((uint16_t) 0x0080UL)    /* Pin 7 selected */
#define GPIO_PIN_8                      ((uint16_t) 0x0100UL)    /* Pin 8 selected */
#define GPIO_PIN_ALL                    ((uint16_t) 0x03FFUL)    /* All pins selected */

/* ANALOG OR DIGTAL ----------------------------------------------------------*/
#define PA00_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN0  = 0U)
#define PA00_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN0  = 1U)
#define PA01_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN1  = 0U)
#define PA01_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN1  = 1U)
#define PA02_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN2  = 0U)
#define PA02_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN2  = 1U)
#define PA03_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN3  = 0U)
#define PA03_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN3  = 1U)
#define PA04_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN4  = 0U)
#define PA04_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN4  = 1U)
#define PA05_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN5  = 0U)
#define PA05_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN5  = 1U)
#define PA06_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN6  = 0U)
#define PA06_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN6  = 1U)
#define PA07_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN7  = 0U)
#define PA07_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN7  = 1U)
#define PA08_DIGTAL_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN8  = 0U)
#define PA08_ANALOG_ENABLE()            (SYM_GPIOA->ANALOG_f.PIN8  = 1U)
#define PB00_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN0  = 0U)
#define PB00_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN0  = 1U)
#define PB01_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN1  = 0U)
#define PB01_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN1  = 1U)
#define PB02_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN2  = 0U)
#define PB02_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN2  = 1U)
#define PB03_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN3  = 0U)
#define PB03_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN3  = 1U)
#define PB04_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN4  = 0U)
#define PB04_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN4  = 1U)
#define PB05_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN5  = 0U)
#define PB05_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN5  = 1U)
#define PB06_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN6  = 0U)
#define PB06_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN6  = 1U)
#define PB07_DIGTAL_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN7  = 0U)
#define PB07_ANALOG_ENABLE()            (SYM_GPIOB->ANALOG_f.PIN7  = 1U)

/* INPUD OR OUTPUT -----------------------------------------------------------*/
#define PA00_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN0  = 0U)
#define PA00_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN0  = 1U)
#define PA01_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN1  = 0U)
#define PA01_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN1  = 1U)
#define PA02_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN2  = 0U)
#define PA02_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN2  = 1U)
#define PA03_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN3  = 0U)
#define PA03_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN3  = 1U)
#define PA04_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN4  = 0U)
#define PA04_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN4  = 1U)
#define PA05_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN5  = 0U)
#define PA05_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN5  = 1U)
#define PA06_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN6  = 0U)
#define PA06_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN6  = 1U)
#define PA07_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN7  = 0U)
#define PA07_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN7  = 1U)
#define PA08_DIR_OUTPUT()               (SYM_GPIOA->DIR_f.PIN8  = 0U)
#define PA08_DIR_INPUT()                (SYM_GPIOA->DIR_f.PIN8  = 1U)
#define PB00_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN0  = 0U)
#define PB00_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN0  = 1U)
#define PB01_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN1  = 0U)
#define PB01_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN1  = 1U)
#define PB02_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN2  = 0U)
#define PB02_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN2  = 1U)
#define PB03_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN3  = 0U)
#define PB03_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN3  = 1U)
#define PB04_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN4  = 0U)
#define PB04_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN4  = 1U)
#define PB05_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN5  = 0U)
#define PB05_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN5  = 1U)
#define PB06_DIR_OUTPUT()               (SYM_GPIOB->DIR_f.PIN6  = 0U)
#define PB06_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN6  = 1U)
#define PB07_DIR_INPUT()                (SYM_GPIOB->DIR_f.PIN7  = 1U)

/* OpenDrain or Push-Pull ----------------------------------------------------*/
#define PA00_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN0  = 1U)
#define PA00_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN0  = 0U)
#define PA01_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN1  = 1U)
#define PA01_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN1  = 0U)
#define PA02_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN2  = 1U)
#define PA02_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN2  = 0U)
#define PA03_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN3  = 1U)
#define PA03_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN3  = 0U)
#define PA04_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN4  = 1U)
#define PA04_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN4  = 0U)
#define PA05_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN5  = 1U)
#define PA05_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN5  = 0U)
#define PA06_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN6  = 1U)
#define PA06_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN6  = 0U)
#define PA07_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN7  = 1U)
#define PA07_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN7  = 0U)
#define PA08_OPENDRAIN_ENABLE()         (SYM_GPIOA->OPENDRAIN_f.PIN8  = 1U)
#define PA08_OPENDRAIN_DISABLE()        (SYM_GPIOA->OPENDRAIN_f.PIN8  = 0U)
#define PB00_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN0  = 1U)
#define PB00_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN0  = 0U)
#define PB01_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN1  = 1U)
#define PB01_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN1  = 0U)
#define PB02_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN2  = 1U)
#define PB02_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN2  = 0U)
#define PB03_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN3  = 1U)
#define PB03_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN3  = 0U)
#define PB04_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN4  = 1U)
#define PB04_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN4  = 0U)
#define PB05_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN5  = 1U)
#define PB05_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN5  = 0U)
#define PB06_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN6  = 1U)
#define PB06_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN6  = 0U)
#define PB07_OPENDRAIN_ENABLE()         (SYM_GPIOB->OPENDRAIN_f.PIN7  = 1U)
#define PB07_OPENDRAIN_DISABLE()        (SYM_GPIOB->OPENDRAIN_f.PIN7  = 0U)

/* PUR -----------------------------------------------------------------------*/
#define PA00_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN0  = 1U)
#define PA00_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN0  = 0U)
#define PA01_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN1  = 1U)
#define PA01_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN1  = 0U)
#define PA02_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN2  = 1U)
#define PA02_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN2  = 0U)
#define PA03_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN3  = 1U)
#define PA03_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN3  = 0U)
#define PA04_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN4  = 1U)
#define PA04_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN4  = 0U)
#define PA05_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN5  = 1U)
#define PA05_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN5  = 0U)
#define PA06_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN6  = 1U)
#define PA06_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN6  = 0U)
#define PA07_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN7  = 1U)
#define PA07_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN7  = 0U)
#define PA08_PUR_ENABLE()               (SYM_GPIOA->PUR_f.PIN8  = 1U)
#define PA08_PUR_DISABLE()              (SYM_GPIOA->PUR_f.PIN8  = 0U)
#define PB00_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN0  = 1U)
#define PB00_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN0  = 0U)
#define PB01_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN1  = 1U)
#define PB01_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN1  = 0U)
#define PB02_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN2  = 1U)
#define PB02_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN2  = 0U)
#define PB03_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN3  = 1U)
#define PB03_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN3  = 0U)
#define PB04_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN4  = 1U)
#define PB04_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN4  = 0U)
#define PB05_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN5  = 1U)
#define PB05_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN5  = 0U)
#define PB06_PUR_ENABLE()               (SYM_GPIOB->PUR_f.PIN6  = 1U)
#define PB06_PUR_DISABLE()              (SYM_GPIOB->PUR_f.PIN6  = 0U)

/* GETVALUE ------------------------------------------------------------------*/
#define PA00_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN0_Msk)
#define PA01_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN1_Msk)
#define PA02_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN2_Msk)
#define PA03_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN3_Msk)
#define PA04_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN4_Msk)
#define PA05_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN5_Msk)
#define PA06_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN6_Msk)
#define PA07_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN7_Msk)
#define PA08_GETVALUE()                 (SYM_GPIOA->IDR & GPIOx_IDR_PIN8_Msk)
#define PB00_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN0_Msk)
#define PB01_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN1_Msk)
#define PB02_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN2_Msk)
#define PB03_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN3_Msk)
#define PB04_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN4_Msk)
#define PB05_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN5_Msk)
#define PB06_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN6_Msk)
#define PB07_GETVALUE()                 (SYM_GPIOB->IDR & GPIOx_IDR_PIN7_Msk)

/* SET HIGH AND LOW ----------------------------------------------------------*/
#define PA00_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS0_Msk)
#define PA00_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR0_Msk)
#define PA01_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS1_Msk)
#define PA01_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR1_Msk)
#define PA02_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS2_Msk)
#define PA02_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR2_Msk)
#define PA03_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS3_Msk)
#define PA03_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR3_Msk)
#define PA04_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS4_Msk)
#define PA04_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR4_Msk)
#define PA05_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS5_Msk)
#define PA05_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR5_Msk)
#define PA06_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS6_Msk)
#define PA06_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR6_Msk)
#define PA07_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS7_Msk)
#define PA07_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR7_Msk)
#define PA08_SETHIGH()                  (SYM_GPIOA->BSRR = GPIOx_BSRR_BSS8_Msk)
#define PA08_SETLOW()                   (SYM_GPIOA->BRR  = GPIOx_BRR_BRR8_Msk)
#define PB00_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS0_Msk)
#define PB00_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR0_Msk)
#define PB01_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS1_Msk)
#define PB01_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR1_Msk)
#define PB02_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS2_Msk)
#define PB02_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR2_Msk)
#define PB03_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS3_Msk)
#define PB03_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR3_Msk)
#define PB04_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS4_Msk)
#define PB04_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR4_Msk)
#define PB05_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS5_Msk)
#define PB05_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR5_Msk)
#define PB06_SETHIGH()                  (SYM_GPIOB->BSRR = GPIOx_BSRR_BSS6_Msk)
#define PB06_SETLOW()                   (SYM_GPIOB->BRR  = GPIOx_BRR_BRR6_Msk)

/* TOG -----------------------------------------------------------------------*/
#define PA00_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN0_Msk)
#define PA01_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN1_Msk)
#define PA02_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN2_Msk)
#define PA03_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN3_Msk)
#define PA04_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN4_Msk)
#define PA05_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN5_Msk)
#define PA06_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN6_Msk)
#define PA07_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN7_Msk)
#define PA08_TOG()                      (SYM_GPIOA->TOG  = GPIOx_TOG_PIN8_Msk)
#define PB00_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN0_Msk)
#define PB01_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN1_Msk)
#define PB02_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN2_Msk)
#define PB03_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN3_Msk)
#define PB04_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN4_Msk)
#define PB05_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN5_Msk)
#define PB06_TOG()                      (SYM_GPIOB->TOG  = GPIOx_TOG_PIN6_Msk)

/* AFx -----------------------------------------------------------------------*/
#define AFx_GPIO_PA00()                 (SYM_GPIOA->AFRL_f.AFR0  = 0U)
#define AFx_UART1RXD_PA00()             (SYM_GPIOA->AFRL_f.AFR0  = 1U)
#define AFx_I2C1SDA_PA00()              (SYM_GPIOA->AFRL_f.AFR0  = 2U)
#define AFx_SPI1SCK_PA00()              (SYM_GPIOA->AFRL_f.AFR0  = 3U)
#define AFx_BTIM1TOGP_PA00()            (SYM_GPIOA->AFRL_f.AFR0  = 4U)
#define AFx_BTIM3ETR_PA00()             (SYM_GPIOA->AFRL_f.AFR0  = 5U)
#define AFx_ATIMBK2_PA00()              (SYM_GPIOA->AFRL_f.AFR0  = 6U)
#define AFx_ATIMCH4_PA00()              (SYM_GPIOA->AFRL_f.AFR0  = 7U)
#define AFx_GPIO_PA01()                 (SYM_GPIOA->AFRL_f.AFR1  = 0U)
#define AFx_UART1TXD_PA01()             (SYM_GPIOA->AFRL_f.AFR1  = 1U)
#define AFx_I2C1SCL_PA01()              (SYM_GPIOA->AFRL_f.AFR1  = 2U)
#define AFx_SPI1NCS_PA01()              (SYM_GPIOA->AFRL_f.AFR1  = 3U)
#define AFx_BTIM1TOGN_PA01()            (SYM_GPIOA->AFRL_f.AFR1  = 4U)
#define AFx_GTIM1CH3_PA01()             (SYM_GPIOA->AFRL_f.AFR1  = 5U)
#define AFx_ATIMBK_PA01()               (SYM_GPIOA->AFRL_f.AFR1  = 6U)
#define AFx_ATIMCH4N_PA01()             (SYM_GPIOA->AFRL_f.AFR1  = 7U)
#define AFx_GPIO_PA02()                 (SYM_GPIOA->AFRL_f.AFR2  = 0U)
#define AFx_PCLKOUT_PA02()              (SYM_GPIOA->AFRL_f.AFR2  = 1U)
#define AFx_ATIMMOEOUT_PA02()           (SYM_GPIOA->AFRL_f.AFR2  = 2U)
#define AFx_SPI1NCS_PA02()              (SYM_GPIOA->AFRL_f.AFR2  = 3U)
#define AFx_VC1OUT_PA02()               (SYM_GPIOA->AFRL_f.AFR2  = 4U)
#define AFx_IROUT_PA02()                (SYM_GPIOA->AFRL_f.AFR2  = 5U)
#define AFx_ATIMETR_PA02()              (SYM_GPIOA->AFRL_f.AFR2  = 6U)
#define AFx_ATIMCH1N_PA02()             (SYM_GPIOA->AFRL_f.AFR2  = 7U)
#define AFx_GPIO_PA03()                 (SYM_GPIOA->AFRL_f.AFR3  = 0U)
#define AFx_UART2TXD_PA03()             (SYM_GPIOA->AFRL_f.AFR3  = 1U)
#define AFx_LPTIMCH1_PA03()             (SYM_GPIOA->AFRL_f.AFR3  = 2U)
#define AFx_SPI1MISO_PA03()             (SYM_GPIOA->AFRL_f.AFR3  = 3U)
#define AFx_BTIM1ETR_PA03()             (SYM_GPIOA->AFRL_f.AFR3  = 4U)
#define AFx_IROUT_PA03()                (SYM_GPIOA->AFRL_f.AFR3  = 5U)
#define AFx_GTIM1CH4_PA03()             (SYM_GPIOA->AFRL_f.AFR3  = 6U)
#define AFx_ATIMCH3_PA03()              (SYM_GPIOA->AFRL_f.AFR3  = 7U)
#define AFx_GPIO_PA04()                 (SYM_GPIOA->AFRL_f.AFR4  = 0U)
#define AFx_UART2RXD_PA04()             (SYM_GPIOA->AFRL_f.AFR4  = 1U)
#define AFx_LPTIMCH2_PA04()             (SYM_GPIOA->AFRL_f.AFR4  = 2U)
#define AFx_SPI1MOSI_PA04()             (SYM_GPIOA->AFRL_f.AFR4  = 3U)
#define AFx_MCOOUT_PA04()               (SYM_GPIOA->AFRL_f.AFR4  = 4U)
#define AFx_VC2OUT_PA04()               (SYM_GPIOA->AFRL_f.AFR4  = 5U)
#define AFx_GTIM1CH3_PA04()             (SYM_GPIOA->AFRL_f.AFR4  = 6U)
#define AFx_ATIMCH1N_PA04()             (SYM_GPIOA->AFRL_f.AFR4  = 7U)
#define AFx_GPIO_PA05()                 (SYM_GPIOA->AFRL_f.AFR5  = 0U)
#define AFx_UART1RXD_PA05()             (SYM_GPIOA->AFRL_f.AFR5  = 1U)
#define AFx_LPTIMOUT_PA05()             (SYM_GPIOA->AFRL_f.AFR5  = 2U)
#define AFx_SPI1SCK_PA05()              (SYM_GPIOA->AFRL_f.AFR5  = 3U)
#define AFx_I2C1SDA_PA05()              (SYM_GPIOA->AFRL_f.AFR5  = 4U)
#define AFx_HEXEN_PA05()                (SYM_GPIOA->AFRL_f.AFR5  = 5U)
#define AFx_GTIM1CH2_PA05()             (SYM_GPIOA->AFRL_f.AFR5  = 6U)
#define AFx_ATIMCH2N_PA05()             (SYM_GPIOA->AFRL_f.AFR5  = 7U)
#define AFx_GPIO_PA06()                 (SYM_GPIOA->AFRL_f.AFR6  = 0U)
#define AFx_UART1TXD_PA06()             (SYM_GPIOA->AFRL_f.AFR6  = 1U)
#define AFx_LPTIMETR_PA06()             (SYM_GPIOA->AFRL_f.AFR6  = 2U)
#define AFx_SPI1MOSI_PA06()             (SYM_GPIOA->AFRL_f.AFR6  = 3U)
#define AFx_I2C1SCL_PA06()              (SYM_GPIOA->AFRL_f.AFR6  = 4U)
#define AFx_BTIM2ETR_PA06()             (SYM_GPIOA->AFRL_f.AFR6  = 5U)
#define AFx_GTIM1CH1_PA06()             (SYM_GPIOA->AFRL_f.AFR6  = 6U)
#define AFx_ATIMCH3N_PA06()             (SYM_GPIOA->AFRL_f.AFR6  = 7U)
#define AFx_GPIO_PA07()                 (SYM_GPIOA->AFRL_f.AFR7  = 0U)
#define AFx_UART1RXD_PA07()             (SYM_GPIOA->AFRL_f.AFR7  = 1U)
#define AFx_I2C1SDA_PA07()              (SYM_GPIOA->AFRL_f.AFR7  = 2U)
#define AFx_SPI1MISO_PA07()             (SYM_GPIOA->AFRL_f.AFR7  = 3U)
#define AFx_LPTIMOUT_PA07()             (SYM_GPIOA->AFRL_f.AFR7  = 4U)
#define AFx_BTIM2TOGP_PA07()            (SYM_GPIOA->AFRL_f.AFR7  = 5U)
#define AFx_ATIMBK_PA07()               (SYM_GPIOA->AFRL_f.AFR7  = 6U)
#define AFx_ATIMCH6_PA07()              (SYM_GPIOA->AFRL_f.AFR7  = 7U)
#define AFx_GPIO_PA08()                 (SYM_GPIOA->AFRH_f.AFR8  = 0U)
#define AFx_UART1TXD_PA08()             (SYM_GPIOA->AFRH_f.AFR8  = 1U)
#define AFx_I2C1SCL_PA08()              (SYM_GPIOA->AFRH_f.AFR8  = 2U)
#define AFx_MCOOUT_PA08()               (SYM_GPIOA->AFRH_f.AFR8  = 3U)
#define AFx_VC1OUT_PA08()               (SYM_GPIOA->AFRH_f.AFR8  = 4U)
#define AFx_BTIM2TOGN_PA08()            (SYM_GPIOA->AFRH_f.AFR8  = 5U)
#define AFx_ATIMBK2_PA08()              (SYM_GPIOA->AFRH_f.AFR8  = 6U)
#define AFx_ATIMCH6N_PA08()             (SYM_GPIOA->AFRH_f.AFR8  = 7U)
#define AFx_GPIO_PB00()                 (SYM_GPIOB->AFRL_f.AFR0  = 0U)
#define AFx_UART1RXD_PB00()             (SYM_GPIOB->AFRL_f.AFR0  = 1U)
#define AFx_UART2CTS_PB00()             (SYM_GPIOB->AFRL_f.AFR0  = 2U)
#define AFx_SPI1SCK_PB00()              (SYM_GPIOB->AFRL_f.AFR0  = 3U)
#define AFx_I2C1SDA_PB00()              (SYM_GPIOB->AFRL_f.AFR0  = 4U)
#define AFx_LVDOUT_PB00()               (SYM_GPIOB->AFRL_f.AFR0  = 5U)
#define AFx_BTIM3TOGP_PB00()            (SYM_GPIOB->AFRL_f.AFR0  = 6U)
#define AFx_ATIMCH1_PB00()              (SYM_GPIOB->AFRL_f.AFR0  = 7U)
#define AFx_GPIO_PB01()                 (SYM_GPIOB->AFRL_f.AFR1  = 0U)
#define AFx_UART1TXD_PB01()             (SYM_GPIOB->AFRL_f.AFR1  = 1U)
#define AFx_UART2RTS_PB01()             (SYM_GPIOB->AFRL_f.AFR1  = 2U)
#define AFx_SPI1NCS_PB01()              (SYM_GPIOB->AFRL_f.AFR1  = 3U)
#define AFx_I2C1SCL_PB01()              (SYM_GPIOB->AFRL_f.AFR1  = 4U)
#define AFx_ADCSAM_PB01()               (SYM_GPIOB->AFRL_f.AFR1  = 5U)
#define AFx_BTIM3TOGN_PB01()            (SYM_GPIOB->AFRL_f.AFR1  = 6U)
#define AFx_ATIMCH2_PB01()              (SYM_GPIOB->AFRL_f.AFR1  = 7U)
#define AFx_GPIO_PB02()                 (SYM_GPIOB->AFRL_f.AFR2  = 0U)
#define AFx_UART2TXD_PB02()             (SYM_GPIOB->AFRL_f.AFR2  = 1U)
#define AFx_UART1CTS_PB02()             (SYM_GPIOB->AFRL_f.AFR2  = 2U)
#define AFx_SPI1MISO_PB02()             (SYM_GPIOB->AFRL_f.AFR2  = 3U)
#define AFx_VC2OUT_PB02()               (SYM_GPIOB->AFRL_f.AFR2  = 4U)
#define AFx_LPTIMCH1_PB02()             (SYM_GPIOB->AFRL_f.AFR2  = 5U)
#define AFx_GTIM1ETR_PB02()             (SYM_GPIOB->AFRL_f.AFR2  = 6U)
#define AFx_ATIMCH2_PB02()              (SYM_GPIOB->AFRL_f.AFR2  = 7U)
#define AFx_GPIO_PB03()                 (SYM_GPIOB->AFRL_f.AFR3  = 0U)
#define AFx_UART2RXD_PB03()             (SYM_GPIOB->AFRL_f.AFR3  = 1U)
#define AFx_UART1RTS_PB03()             (SYM_GPIOB->AFRL_f.AFR3  = 2U)
#define AFx_SPI1MOSI_PB03()             (SYM_GPIOB->AFRL_f.AFR3  = 3U)
#define AFx_MCOOUT_PB03()               (SYM_GPIOB->AFRL_f.AFR3  = 4U)
#define AFx_BTIM2TOGN_PB03()            (SYM_GPIOB->AFRL_f.AFR3  = 5U)
#define AFx_GTIM1CH4_PB03()             (SYM_GPIOB->AFRL_f.AFR3  = 6U)
#define AFx_ATIMCH2N_PB03()             (SYM_GPIOB->AFRL_f.AFR3  = 7U)
#define AFx_GPIO_PB04()                 (SYM_GPIOB->AFRL_f.AFR4  = 0U)
#define AFx_UART2TXD_PB04()             (SYM_GPIOB->AFRL_f.AFR4  = 1U)
#define AFx_RTCOUT_PB04()               (SYM_GPIOB->AFRL_f.AFR4  = 2U)
#define AFx_ADCSAM_PB04()               (SYM_GPIOB->AFRL_f.AFR4  = 3U)
#define AFx_BTIM1ETR_PB04()             (SYM_GPIOB->AFRL_f.AFR4  = 4U)
#define AFx_BTIM2TOGP_PB04()            (SYM_GPIOB->AFRL_f.AFR4  = 5U)
#define AFx_GTIM1CH3_PB04()             (SYM_GPIOB->AFRL_f.AFR4  = 6U)
#define AFx_ATIMCH1_PB04()              (SYM_GPIOB->AFRL_f.AFR4  = 7U)
#define AFx_GPIO_PB05()                 (SYM_GPIOB->AFRL_f.AFR5  = 0U)
#define AFx_UART2TXD_PB05()             (SYM_GPIOB->AFRL_f.AFR5  = 1U)
#define AFx_RTCTAMP_PB05()              (SYM_GPIOB->AFRL_f.AFR5  = 2U)
#define AFx_SPI1MISO_PB05()             (SYM_GPIOB->AFRL_f.AFR5  = 3U)
#define AFx_I2C1SDA_PB05()              (SYM_GPIOB->AFRL_f.AFR5  = 4U)
#define AFx_GTIM1ETR_PB05()             (SYM_GPIOB->AFRL_f.AFR5  = 5U)
#define AFx_GTIM1CH2_PB05()             (SYM_GPIOB->AFRL_f.AFR5  = 6U)
#define AFx_ATIMCH5_PB05()              (SYM_GPIOB->AFRL_f.AFR5  = 7U)
#define AFx_GPIO_PB06()                 (SYM_GPIOB->AFRL_f.AFR6  = 0U)
#define AFx_UART2RXD_PB06()             (SYM_GPIOB->AFRL_f.AFR6  = 1U)
#define AFx_RTCOUT_PB06()               (SYM_GPIOB->AFRL_f.AFR6  = 2U)
#define AFx_SPI1MOSI_PB06()             (SYM_GPIOB->AFRL_f.AFR6  = 3U)
#define AFx_I2C1SCL_PB06()              (SYM_GPIOB->AFRL_f.AFR6  = 4U)
#define AFx_ATIMETR_PB06()              (SYM_GPIOB->AFRL_f.AFR6  = 5U)
#define AFx_GTIM1CH1_PB06()             (SYM_GPIOB->AFRL_f.AFR6  = 6U)
#define AFx_ATIMCH5N_PB06()             (SYM_GPIOB->AFRL_f.AFR6  = 7U)
#define AFx_GPIO_PB07()                 (SYM_GPIOB->AFRL_f.AFR7  = 0U)
#define AFx_GTIM1ETR_PB07()             (SYM_GPIOB->AFRL_f.AFR7  = 5U)
#define AFx_ATIMETR_PB07()              (SYM_GPIOB->AFRL_f.AFR7  = 6U)
#define AFx_ATIMBK_PB07()               (SYM_GPIOB->AFRL_f.AFR7  = 7U)


/******************************************************************************/
/* Global macro function                                                      */
/******************************************************************************/
/*------------------------------ GPIO 获取中断源 -----------------------------*/
/**
  * @brief  获取 GPIO外部上升沿 中断触发源
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_GET_IT_RISE_SOURCE(GPIOx, GPIO_PIN_x)   (GPIOx->RISEIE & (GPIO_PIN_x))

/**
  * @brief  获取 GPIO外部下降沿 中断触发源
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_GET_IT_FALL_SOURCE(GPIOx, GPIO_PIN_x)   (GPIOx->FALLIE & (GPIO_PIN_x))

/*------------------------------ GPIO 使能中断源 -----------------------------*/
/**
  * @brief  使能 GPIO外部上升沿 中断触发源
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚 
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_ENABLE_IT_RISE(GPIOx, GPIO_PIN_x)       (GPIOx->RISEIE |= (GPIO_PIN_x))

/**
  * @brief  使能 GPIO外部下降沿 中断触发源
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚 
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_ENABLE_IT_FALL(GPIOx, GPIO_PIN_x)       (GPIOx->FALLIE |= (GPIO_PIN_x))

/*------------------------------ GPIO 关闭中断源 -----------------------------*/
/**
  * @brief  关闭 GPIO外部上升沿 中断触发源
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚 
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_DISABLE_IT_RISE(GPIOx, GPIO_PIN_x)      (GPIOx->RISEIE &= ~((uint32_t)(GPIO_PIN_x)))

/**
  * @brief  关闭 GPIO外部下降沿 中断触发源
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚 
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_DISABLE_IT_FALL(GPIOx, GPIO_PIN_x)      (GPIOx->FALLIE &= ~((uint32_t)(GPIO_PIN_x)))

/*------------------------------- GPIO 中断标志 ------------------------------*/
/**
  * @brief  获取 GPIO中断触发标志
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚 
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_GET_FLAG(GPIOx, GPIO_PIN_x)             (GPIOx->ISR  & (GPIO_PIN_x))

/**
  * @brief  清除 GPIO中断触发标志
  * @param  GPIOx       : GPIO 端口
  *                       @arg SYM_GPIOA
  *                       @arg SYM_GPIOB
  * @param  GPIO_PIN_x  : GPIO 引脚 
                          GPIOA可选引脚: GPIO_PIN_0 ~ GPIO_PIN_8
                          GPIOB可选引脚: GPIO_PIN_0 ~ GPIO_PIN_7
  * @retval
  */
#define HAL_GPIO_CLR_FLAG(GPIOx, GPIO_PIN_x)             (GPIOx->ICR = ~((uint32_t)(GPIO_PIN_x)))


/******************************************************************************/
/* Exported variables ('extern', definition in C source)                      */
/******************************************************************************/


/******************************************************************************/
/* Global function prototypes ('extern', definition in C source)              */
/******************************************************************************/
void          HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
void          HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GpioPins);
uint16_t      HAL_GPIO_ReadPins(GPIO_TypeDef *GPIOx, uint16_t GpioPins);
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GpioPins);
void          HAL_GPIO_WritePins(GPIO_TypeDef *GPIOx, uint16_t GpioPins, GPIO_PinState PinState);
void          HAL_GPIO_HighByte_Write(GPIO_TypeDef *GPIOx, uint8_t  Value);
void          HAL_GPIO_LowByte_Write(GPIO_TypeDef *GPIOx, uint8_t  Value);
void          HAL_GPIO_TogglePins(GPIO_TypeDef *GPIOx, uint16_t GpioPins);
void          HAL_GPIO_IntFilter_Config(GPIO_TypeDef *GPIOx, uint16_t GpioPins, GPIO_FilterClkTypeDef FltClk);


#ifdef __cplusplus
}
#endif

#endif /* __SYM32L010_HAL_GPIO_H */


/************************ (C) COPYRIGHT SIYIMicro *****END OF FILE*************/
